Context Adaptive Variable Length Decoding (CAVLD) module takes the lion chair of the H.264/AVC video decoder time due to its complexity. In order to ameliorate decoding speed, a new CAVLD algorithm and an efficient internal memory design were implemented on Digital Signal Processor (DSP). The proposed CAVLD algorithm, Zero Length Prefix (ZLP), was designed to optimize the first syntax element: the CoeffToken. ZLP implementation reduces CAVLD execution time to 21% instead of 41% from decoding time with a throughput of 1.28 MegaMB/s. In addition, the decoder speed was increased from 36 frames per second (fps) to 44 fps for a CIF compressed bitstream.
Published in | Science Journal of Circuits, Systems and Signal Processing (Volume 2, Issue 1) |
DOI | 10.11648/j.cssp.20130201.12 |
Page(s) | 6-15 |
Creative Commons |
This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited. |
Copyright |
Copyright © The Author(s), 2013. Published by Science Publishing Group |
H.264 Video Coding Standard, Decoder, CAVLD, Coefftoken, TMS320C64 DSP
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APA Style
Taheni Damak, Imen Werda, Mohamed Ali Ben Ayed, Nouri Masmoudi. (2013). Context Adaptive Variable Length Decoding Optimization and Implementation on Tms320c64 Dsp for H.264/Avc. Science Journal of Circuits, Systems and Signal Processing, 2(1), 6-15. https://doi.org/10.11648/j.cssp.20130201.12
ACS Style
Taheni Damak; Imen Werda; Mohamed Ali Ben Ayed; Nouri Masmoudi. Context Adaptive Variable Length Decoding Optimization and Implementation on Tms320c64 Dsp for H.264/Avc. Sci. J. Circuits Syst. Signal Process. 2013, 2(1), 6-15. doi: 10.11648/j.cssp.20130201.12
AMA Style
Taheni Damak, Imen Werda, Mohamed Ali Ben Ayed, Nouri Masmoudi. Context Adaptive Variable Length Decoding Optimization and Implementation on Tms320c64 Dsp for H.264/Avc. Sci J Circuits Syst Signal Process. 2013;2(1):6-15. doi: 10.11648/j.cssp.20130201.12
@article{10.11648/j.cssp.20130201.12, author = {Taheni Damak and Imen Werda and Mohamed Ali Ben Ayed and Nouri Masmoudi}, title = {Context Adaptive Variable Length Decoding Optimization and Implementation on Tms320c64 Dsp for H.264/Avc}, journal = {Science Journal of Circuits, Systems and Signal Processing}, volume = {2}, number = {1}, pages = {6-15}, doi = {10.11648/j.cssp.20130201.12}, url = {https://doi.org/10.11648/j.cssp.20130201.12}, eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.cssp.20130201.12}, abstract = {Context Adaptive Variable Length Decoding (CAVLD) module takes the lion chair of the H.264/AVC video decoder time due to its complexity. In order to ameliorate decoding speed, a new CAVLD algorithm and an efficient internal memory design were implemented on Digital Signal Processor (DSP). The proposed CAVLD algorithm, Zero Length Prefix (ZLP), was designed to optimize the first syntax element: the CoeffToken. ZLP implementation reduces CAVLD execution time to 21% instead of 41% from decoding time with a throughput of 1.28 MegaMB/s. In addition, the decoder speed was increased from 36 frames per second (fps) to 44 fps for a CIF compressed bitstream.}, year = {2013} }
TY - JOUR T1 - Context Adaptive Variable Length Decoding Optimization and Implementation on Tms320c64 Dsp for H.264/Avc AU - Taheni Damak AU - Imen Werda AU - Mohamed Ali Ben Ayed AU - Nouri Masmoudi Y1 - 2013/02/20 PY - 2013 N1 - https://doi.org/10.11648/j.cssp.20130201.12 DO - 10.11648/j.cssp.20130201.12 T2 - Science Journal of Circuits, Systems and Signal Processing JF - Science Journal of Circuits, Systems and Signal Processing JO - Science Journal of Circuits, Systems and Signal Processing SP - 6 EP - 15 PB - Science Publishing Group SN - 2326-9073 UR - https://doi.org/10.11648/j.cssp.20130201.12 AB - Context Adaptive Variable Length Decoding (CAVLD) module takes the lion chair of the H.264/AVC video decoder time due to its complexity. In order to ameliorate decoding speed, a new CAVLD algorithm and an efficient internal memory design were implemented on Digital Signal Processor (DSP). The proposed CAVLD algorithm, Zero Length Prefix (ZLP), was designed to optimize the first syntax element: the CoeffToken. ZLP implementation reduces CAVLD execution time to 21% instead of 41% from decoding time with a throughput of 1.28 MegaMB/s. In addition, the decoder speed was increased from 36 frames per second (fps) to 44 fps for a CIF compressed bitstream. VL - 2 IS - 1 ER -