A current-mode image sensor architecture using a linear-logarithmic pixel in order to improve the dynamic range is presented. The pixel cell is based on a 3T active pixel structure with a PMOS readout transistor in the linear region of operation and a PMOS reset transistor that allows for a linear-logarithmic response. An intrascene dynamic range of 90dB is obtained with a pixel fill factor of 37%. The readout circuit is composed of a first-generation current conveyor, a current memory employed as a delta reset sampling unit, a differential amplifier used as an integrator and a dynamic comparator. The pixel response operating mode is determined in the column readout. A signal is sent to the digital processing unit as an indicator to determine the pixel response operating mode in order to allow the proper analog to digital conversion. The image lag effect observed in the pixel output current is removed by the delta reset sampling circuit. Experimental results, obtained from a test structure, are presented. The circuit was fabricated in a CMOS 0.35um process from Austria Microsystems.
| Published in | Science Journal of Circuits, Systems and Signal Processing (Volume 2, Issue 1) |
| DOI | 10.11648/j.cssp.20130201.13 |
| Page(s) | 16-21 |
| Creative Commons |
This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited. |
| Copyright |
Copyright © The Author(s), 2013. Published by Science Publishing Group |
Active Pixel Sensor (APS), Combined Linear-Logarithmic Response, Delta Reset Sampling (DRS), Current Comparator (CMP)
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APA Style
Elham Khamsehashari, Yves Audet. (2013). Response Mode Detection of a Linear-Logarithmic Image Sensor Using a Current-Mode Readout Circuit. Science Journal of Circuits, Systems and Signal Processing, 2(1), 16-21. https://doi.org/10.11648/j.cssp.20130201.13
ACS Style
Elham Khamsehashari; Yves Audet. Response Mode Detection of a Linear-Logarithmic Image Sensor Using a Current-Mode Readout Circuit. Sci. J. Circuits Syst. Signal Process. 2013, 2(1), 16-21. doi: 10.11648/j.cssp.20130201.13
AMA Style
Elham Khamsehashari, Yves Audet. Response Mode Detection of a Linear-Logarithmic Image Sensor Using a Current-Mode Readout Circuit. Sci J Circuits Syst Signal Process. 2013;2(1):16-21. doi: 10.11648/j.cssp.20130201.13
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Download@article{10.11648/j.cssp.20130201.13,
author = {Elham Khamsehashari and Yves Audet},
title = {Response Mode Detection of a Linear-Logarithmic Image Sensor Using a Current-Mode Readout Circuit},
journal = {Science Journal of Circuits, Systems and Signal Processing},
volume = {2},
number = {1},
pages = {16-21},
doi = {10.11648/j.cssp.20130201.13},
url = {https://doi.org/10.11648/j.cssp.20130201.13},
eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.cssp.20130201.13},
abstract = {A current-mode image sensor architecture using a linear-logarithmic pixel in order to improve the dynamic range is presented. The pixel cell is based on a 3T active pixel structure with a PMOS readout transistor in the linear region of operation and a PMOS reset transistor that allows for a linear-logarithmic response. An intrascene dynamic range of 90dB is obtained with a pixel fill factor of 37%. The readout circuit is composed of a first-generation current conveyor, a current memory employed as a delta reset sampling unit, a differential amplifier used as an integrator and a dynamic comparator. The pixel response operating mode is determined in the column readout. A signal is sent to the digital processing unit as an indicator to determine the pixel response operating mode in order to allow the proper analog to digital conversion. The image lag effect observed in the pixel output current is removed by the delta reset sampling circuit. Experimental results, obtained from a test structure, are presented. The circuit was fabricated in a CMOS 0.35um process from Austria Microsystems.},
year = {2013}
}
TY - JOUR T1 - Response Mode Detection of a Linear-Logarithmic Image Sensor Using a Current-Mode Readout Circuit AU - Elham Khamsehashari AU - Yves Audet Y1 - 2013/02/20 PY - 2013 N1 - https://doi.org/10.11648/j.cssp.20130201.13 DO - 10.11648/j.cssp.20130201.13 T2 - Science Journal of Circuits, Systems and Signal Processing JF - Science Journal of Circuits, Systems and Signal Processing JO - Science Journal of Circuits, Systems and Signal Processing SP - 16 EP - 21 PB - Science Publishing Group SN - 2326-9073 UR - https://doi.org/10.11648/j.cssp.20130201.13 AB - A current-mode image sensor architecture using a linear-logarithmic pixel in order to improve the dynamic range is presented. The pixel cell is based on a 3T active pixel structure with a PMOS readout transistor in the linear region of operation and a PMOS reset transistor that allows for a linear-logarithmic response. An intrascene dynamic range of 90dB is obtained with a pixel fill factor of 37%. The readout circuit is composed of a first-generation current conveyor, a current memory employed as a delta reset sampling unit, a differential amplifier used as an integrator and a dynamic comparator. The pixel response operating mode is determined in the column readout. A signal is sent to the digital processing unit as an indicator to determine the pixel response operating mode in order to allow the proper analog to digital conversion. The image lag effect observed in the pixel output current is removed by the delta reset sampling circuit. Experimental results, obtained from a test structure, are presented. The circuit was fabricated in a CMOS 0.35um process from Austria Microsystems. VL - 2 IS - 1 ER -
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